Modified approach to automata state encoding for LUT FPGA implementation

Author

Lemberski, I.

Author_Institution

Riga Aviation Univ., Latvia

Volume

1

fYear

1998

fDate

25-27 Aug 1998

Firstpage

196

Abstract

Burgun et al. (1994) presented a support-based encoding method. It was based on a seed encoding and step-by-step merging of state variables to minimize sequential logic summary support. The main drawback of the encoding procedure is (re-) computing summary support after merging each pair of state variables. It increases CPU time significantly. A simplified procedure of support computation (faster but less accurate) is developed. A modified state encoding method is offered. The author´s approach reduces CPU time and increases the dimension of FSMs that can be processed by the encoding procedure. The method was tested and the result compared with those obtained by the encoding procedures: JEDI,NOVA,LAX

Keywords

field programmable gate arrays; finite state machines; table lookup; CPU time; LUT FPGA implementation; automata state encoding; lookup table; seed encoding; sequential logic summary support; state variable merging; Automata; Cost function; Encoding; Field programmable gate arrays; Input variables; Logic; Merging; Table lookup; Testing; Yttrium;

fLanguage

English

Publisher

ieee

Conference_Titel

Euromicro Conference, 1998. Proceedings. 24th

Conference_Location

Vasteras

ISSN

1089-6503

Print_ISBN

0-8186-8646-4

Type

conf

DOI

10.1109/EURMIC.1998.711798

Filename

711798