A 20-GHz 4.8-dB NF low noise amplifier

Author

Yang, Kang ; Yan, Na

Author_Institution

ASIC & Syst. State Key Lab., Fudan Univ. Shanghai, Shanghai, China

fYear

2011

fDate

15-17 April 2011

Firstpage

8

Lastpage

11

Abstract

A 20-GHz low noise amplifier (LNA) is designed in 0.13μm CMOS technology. The proposed amplifier employs two cascade stages to achieve a peak power-gain of 25 dB and a noise figure of 4.8 dB at 20.4 GHz. The power consumption of the LNA circuit is 12.2 mW from a 1.5V supply. This paper also presents a novel model for sub-nH planar spiral inductors, which accounts for high-frequency effects and incorporates interconnection lines in the 1.5-turn spiral inductor. The new model demonstrates a good agreement with S-parameter from electromagnetic field simulator within 40GHz.

Keywords

CMOS analogue integrated circuits; MMIC power amplifiers; S-parameters; field effect MMIC; inductors; integrated circuit interconnections; low noise amplifiers; CMOS technology; S-parameter; electromagnetic field simulator; frequency 20.4 GHz; gain 25 dB; high frequency effect; interconnection lines; low noise amplifier; noise figure 4.8 dB; power 12.2 mW; size 0.13 mum; sub-nH planar spiral inductor; voltage 1.5 V; Inductance; Inductors; Integrated circuit modeling; Metals; Scattering parameters; Semiconductor device modeling; Spirals; 20GHz; low noise amplifier (LNA); modeling; noise figure; spiral inductor; sub-nH;

fLanguage

English

Publisher

ieee

Conference_Titel

Electric Information and Control Engineering (ICEICE), 2011 International Conference on

Conference_Location

Wuhan

Print_ISBN

978-1-4244-8036-4

Type

conf

DOI

10.1109/ICEICE.2011.5777584

Filename

5777584