A novel linearization technique for linear/pseudo-linear RF CMOS power amplifiers

A novel linearization technique for linear and pseudo-linear CMOS power amplifiers (PAs) is presented. The proposed technique uses the third-order harmonic of the PA output to generate a signal, which compensates the nonlinear component at the fundamental frequency of the PA output. The reconstructed signal is then subtracted from the output of the PA to cancel out its nonlinear component. A class-AB CMOS power amplifier, incorporating this technique, is designed and fabricated in a standard 0.18 μm CMOS process. Experimental results of this class-AB PA at 900 MHz are presented. A two-tone test with frequency spacing of 1 MHz shows a 12-dB reduction of the IMD3 component.