RACHANA: an integrated placement and routing approach to CMOS analog cells

The authors present a new integrated placement and routing algorithm, RACHANA, for CMOS analog cells. Like any analog layout expert, the approach takes into account the relative positions of various primitive analog modules, e.g., current mirror, differential pair, etc., in the circuit diagram. These modules are automatically recognized in the input circuit schematic and procedurally generated by an efficient set of module generators developed for this purpose. The use of a novel representation of a circuit schematic, where both circuit components and nets are treated in a similar way, has made it possible to combine conventionally two sequential tasks, placement and routing, into a single unified task. The preliminary results produced from the first implementation of the approach have verified the power and efficiency of the algorithm