• DocumentCode
    3283104
  • Title

    Delay And Area Optimization For Compact Placement By Gate Resizing And Relocation

  • Author

    Weitorg Chuang

  • fYear
    1994
  • fDate
    6-10 Nov 1994
  • Firstpage
    145
  • Lastpage
    148
  • Keywords
    Capacitance; Circuits; Cost function; Delay; Libraries; Linear programming; Logic gates; Piecewise linear approximation; Piecewise linear techniques; Timing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer-Aided Design, 1994., IEEE/ACM International Conference on
  • ISSN
    1063-6757
  • Print_ISBN
    0-8186-3010-8
  • Type

    conf

  • DOI
    10.1109/ICCAD.1994.629757
  • Filename
    629757
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3283104