Designing systems on silicon: a digital spread spectrum pager

Mobile personal communications applications require high speed, light weight, low power and customisability. They also exhibit architectural heterogeneity of sub-systems. This paper describes a design methodology for such applications which spans the whole design process; from specification, through simulation to synthesis. The objectives of this methodology are to bridge the gap between system designer and the ASIC implementator, to support HW/SW co-design and allow reuse of complex silicon blocks. This methodology has been successfully applied in the design of a satellite pager. The resulting chip required an effort of one person-year and comprises 340,000 transistors in 47 mm² using a 0.6 μ technology