Modeling envelope-tracking RF amplifiers

In the past years, the design of modern RF transceivers has been widely driven by strict and contrasting design specifications (linearity, efficiency, etc.). This is especially true for the advent of the new 4G (LTE) and of the next 5G standards. In this context, power amplifiers (PAs) have received a particular attention and we have seen the promotion of various pre-distortion techniques (DPD). In parallel, envelope tracking techniques recently allowed significant improvements in terms of power consumption. While some methods capturing the preformatting of the DC bias voltage have been proposed, the majority are based on static observations. Unfortunately, the design on new IC processes, either small-scale CMOS or GaN, is very sensitive to nonlinear memory effects. Those effects may alter the quality of the correction. This paper proposes a way to characterize those effects.