• DocumentCode
    3287297
  • Title

    Thermal analysis and optimization of 2.5-D integrated voltage regulator

  • Author

    Taigon Song ; Sturcken, Noah ; Athikulwongse, Krit ; Shepard, Kenneth ; Sung Kyu Lim

  • Author_Institution
    Dept. of ECE, Georgia Inst. of Technol., Atlanta, GA, USA
  • fYear
    2012
  • fDate
    21-24 Oct. 2012
  • Firstpage
    25
  • Lastpage
    28
  • Abstract
    Integrated voltage regulators (IVRs) promise to improve performance-per-watt for microprocessors and systems-on-chip by reducing supply voltage margins, resistive losses in the power distribution network, and by enabling power management with greater temporal resolution. However, the thermal impact of IVRs has not been well studied, and the methodologies for thermal analysis of analog/digital mixed-signal designs, such as voltage regulators on chip, have not yet been developed. In this paper, we present a thermal analysis methodology for 2.5-D IVR. Our results show that (1) the integrated power inductor is the hottest component in the IVR, and (2) the temperature of the IVR rises rapidly when the power inductor and the circuitries of the IVR chip overlap. In order to address these issues, we propose two design optimization techniques: design block relocation and inductor spreading. Related experiments show the effectiveness of these methods.
  • Keywords
    system-on-chip; thermal management (packaging); voltage regulators; 2.5-D integrated voltage regulator; IVR chip overlap; analog-digital mixed-signal design; design block relocation; inductor spreading; integrated power inductor; microprocessor; power distribution network; power management; resistive losses; supply voltage margin; systems-on-chip; temporal resolution; thermal analysis; thermal impact; Heating; Inductors; Integrated circuits; Regulators; Silicon; Thermal analysis; Voltage control; Analog; Integrated Voltage Regulator; Mixed System; Silicon Interposer; Thermal Analysis;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electrical Performance of Electronic Packaging and Systems (EPEPS), 2012 IEEE 21st Conference on
  • Conference_Location
    Tempe, AZ
  • Print_ISBN
    978-1-4673-2539-4
  • Electronic_ISBN
    978-1-4673-2537-0
  • Type

    conf

  • DOI
    10.1109/EPEPS.2012.6457835
  • Filename
    6457835