Eye diagram parameter extraction of nano scale VLSI interconnects

Author

Mehri, Milad ; Sarvari, Reza ; Seydolhosseini, A.

Author_Institution

Fac. of Electr. & Comput. Eng., Univ. of Tehran, Tehran, Iran

fYear

2012

fDate

21-24 Oct. 2012

Firstpage

327

Lastpage

330

Abstract

In this paper, jitter due to both capacitive and inductive coupling is studied. Maximum frequency of driving signal on a wire is limited by its input rise time, fall time, pulse width, and the coupling effect from its neighbors. The analytical expressions to estimate the deterministic jitter time due to these effects are presented. The estimation is based on the fastest and slowest approximation of the signal waveform components. Also, we have extracted the eye opening parameters of the eye diagram. The inductance effects significance is shown on eye opening and jitter time. The 45nm technology is used for estimating the horizontal and vertical eye opening and jitter time. The presented formula is compared with the simulations for some cases and it shows good agreements.

Keywords

VLSI; approximation theory; integrated circuit interconnections; jitter; nanoelectronics; capacitive coupling; coupling effect; deterministic jitter; driving signal; eye diagram parameter extraction; eye opening parameter extraction; horizontal eye opening estimation; inductance effects; inductive coupling; nanoscale VLSI interconnects; pulse width; signal waveform component approximation; size 45 nm; vertical eye opening estimation; Approximation methods; Couplings; Estimation; Integrated circuit interconnections; Jitter; Simulation; Wires; Eye diagram; Eye opening; Jittre; VLSI Interconnect;

fLanguage

English

Publisher

ieee

Conference_Titel

Electrical Performance of Electronic Packaging and Systems (EPEPS), 2012 IEEE 21st Conference on

Conference_Location

Tempe, AZ

Print_ISBN

978-1-4673-2539-4

Electronic_ISBN

978-1-4673-2537-0

Type

conf

DOI

10.1109/EPEPS.2012.6457908

Filename

6457908