DocumentCode
3295032
Title
Radiation hardened read circuit with high reliability for SOI based SONOS memory
Author
Li, Kan ; Wu, Dong ; Wang, Xueqiang ; Qiao, Fengying ; Deng, Ning ; Pan, Liyang
Author_Institution
Inst. of Microelectron., Tsinghua Univ., Beijing, China
fYear
2009
fDate
6-10 July 2009
Firstpage
233
Lastpage
236
Abstract
A radiation hardened read circuit for a SONOS type EEPROM memory is designed in 0.6mum SOI process. Total dose radiation would cause large threshold voltage shifts of both memory cells and MOS transistors, hence degrades the reliability and performance of the sense amplifier. Compensation techniques for the sampling inverter and discharge path are proposed to achieve radiation hardness. Double branch precharge technique is developed to improve the read speed. As a result, the proposed sense amplifier is not sensitive to the radiation. Besides its high reliability, the proposed read circuit demonstrates high speed, achieving a sensing time of only 9.67ns.
Keywords
EPROM; MOSFET; semiconductor device reliability; silicon-on-insulator; MOS transistors; SOI based SONOS memory; SONOS type EEPROM memory; compensation techniques; memory cells; radiation hardened read circuit; sampling inverter; sense amplifier; size 0.6 mum; time 9.67 ns; Circuits; Degradation; EPROM; Inverters; MOS devices; MOSFETs; Radiation hardening; SONOS devices; Sampling methods; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Physical and Failure Analysis of Integrated Circuits, 2009. IPFA 2009. 16th IEEE International Symposium on the
Conference_Location
Suzhou, Jiangsu
ISSN
1946-1542
Print_ISBN
978-1-4244-3911-9
Electronic_ISBN
1946-1542
Type
conf
DOI
10.1109/IPFA.2009.5232661
Filename
5232661
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