DocumentCode
3295366
Title
Dynamic bias temperature instability of p-channel polycrystalline silicon thin-film transistors
Author
Huang, Ching-Fang ; Sun, Hung-Chang ; Kuo, Ping-Sheng ; Chen, Yen-Ting ; Chee Wee Liu ; Hsu, Yuan-Jun ; Chen, Jim-Shone
Author_Institution
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
fYear
2009
fDate
6-10 July 2009
Firstpage
158
Lastpage
162
Abstract
The impact ionization that occurred near channel-S/D junctions is responsible for the dynamic bias temperature instability (BTI) of p-channel poly-Si thin-film transistors (TFTs). Impact ionization is induced by lateral electric field when gate voltage switches from inversion or full-depletion to accumulation bias. Drain current increases initially due to shortened effective channel length. As the stress time increases, the grain barrier height increases to reduce the drain current, especially at high temperature. In addition to the transient switches, the plateau portions of the gate pulse have significant impact on the device degradation for large stress amplitudes.
Keywords
thin film transistors; dynamic bias temperature instability; impact ionization; p-channel polycrystalline silicon thin-film transistors; Circuits; Degradation; Glass; Impact ionization; Silicon; Stress; Switches; Temperature; Thin film transistors; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Physical and Failure Analysis of Integrated Circuits, 2009. IPFA 2009. 16th IEEE International Symposium on the
Conference_Location
Suzhou, Jiangsu
ISSN
1946-1542
Print_ISBN
978-1-4244-3911-9
Electronic_ISBN
1946-1542
Type
conf
DOI
10.1109/IPFA.2009.5232678
Filename
5232678
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