DocumentCode
3295710
Title
Physical failure analysis of package qualification for new product and process
Author
Lin, Yi-Chen ; Chang, Hung-Jia
Author_Institution
Quality Div., Powerchip Semicond. Corp., Hsinchu, Taiwan
fYear
2010
fDate
5-9 July 2010
Firstpage
1
Lastpage
4
Abstract
In the studies, we investigate the cause of failure that occur during pilot run and new process evaluation. The results are fed back to wafer and assembly design and process improvement. From our results, the evaluation for package qualification can find out not only package but also wafer process issue.
Keywords
DRAM chips; ball grid arrays; failure analysis; DRAM product; assembly design; dynamic random access memory; package qualification evaluation; physical failure analysis; wafer process evaluation; window ball grid array; Aluminum; Assembly; Corrosion; Failure analysis; Humidity; Qualifications; Semiconductor device packaging; Stress; Testing; Wire;
fLanguage
English
Publisher
ieee
Conference_Titel
Physical and Failure Analysis of Integrated Circuits (IPFA), 2010 17th IEEE International Symposium on the
Conference_Location
Singapore
ISSN
1946-1542
Print_ISBN
978-1-4244-5596-6
Type
conf
DOI
10.1109/IPFA.2010.5531977
Filename
5531977
Link To Document