DocumentCode
3298954
Title
A very high-frequency CMOS self-biasing complementary folded cascode differential difference current conveyor with application examples
Author
Ibrahim, M.A. ; Kuntman, H. ; Cicekoglu, O.
Author_Institution
Dept. of Electron. & Commun. Eng., Istanbul Tech. Univ., Turkey
Volume
1
fYear
2002
fDate
4-7 Aug. 2002
Abstract
In this paper a very high-frequency CMOS configuration for differential difference current conveyor (DDCC) based on self-biasing complementary folded cascode (CFC) circuit is proposed. The circuit uses no additional bias voltage sources other than the two supply rails. In addition, DDCC-based four novel first order all-pass configurations are presented as an example of application of the proposed CMOS DDCC circuit. Simulation results are included to verify the theory.
Keywords
CMOS analogue integrated circuits; VHF filters; active filters; all-pass filters; current conveyors; VHF CMOS configuration; all-pass filters; differential difference current conveyor; first order all-pass configurations; self-biasing complementary folded cascode circuit; very high-frequency configuration; Analog circuits; Automatic voltage control; Circuit simulation; Instruments; Radiofrequency interference; Rails; Railway engineering; Signal processing; User-generated content; Wires;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2002. MWSCAS-2002. The 2002 45th Midwest Symposium on
Print_ISBN
0-7803-7523-8
Type
conf
DOI
10.1109/MWSCAS.2002.1187211
Filename
1187211
Link To Document