Hybrid data/configuration caching for striped FPGAs

Author

Deshpande, Deepali ; Somani, Arun K. ; Tyagi, Akhilesh

Author_Institution

Dept. of Electr. & Comput. Eng., Iowa State Univ., Ames, IA, USA

fYear

1999

fDate

1999

Firstpage

294

Lastpage

295

Abstract

Most custom computing machine (CCM) design has centered around field-programmable gate array (FPGA) technology and rapid prototyping applications. FPGAs are reconfigured to map parts of the application. The performance of an FPGA when used as a virtual hardware engine depends on its reconfiguration granularity. We study the striped FPGA and propose a hybrid mechanism to process a large amount of data using a combination of data and configuration caching

Keywords

cache storage; field programmable gate arrays; performance evaluation; reconfigurable architectures; special purpose computers; custom computing machine design; hybrid data/configuration caching; rapid prototyping; reconfiguration granularity; striped FPGAs; virtual hardware engine; Application software; Computer science; Design engineering; Engines; Fabrics; Field programmable gate arrays; Hardware; Pipelines; Platform virtualization; Prototypes;

fLanguage

English

Publisher

ieee

Conference_Titel

Field-Programmable Custom Computing Machines, 1999. FCCM '99. Proceedings. Seventh Annual IEEE Symposium on

Conference_Location

Napa Valley, CA

Print_ISBN

0-7695-0375-6

Type

conf

DOI

10.1109/FPGA.1999.803703

Filename

803703

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3300791