Multi-Gigahertz Test Signal Synthesis with "Timing-on-the-Fly"

This paper introduces a novel Timing Generator Format Controller (TGFC) circuit that produces programmable multi-gigahertz signals with "timing-on-the-fly" capability. For the first time (we believe), timing edges can be programmed to occur at almost any point during the test, limited only by a minimum pulse-width (~70ps) and maximum sustainable data rate (~3.2Gbps in the prototype). Timing resolution is 10ps in the present prototype, and approximately +/-20ps accuracy is achieved, including ~6sigma random jitter. The use of multiple, overlapping delay generators assures that no "dead" times are encountered, and enables extremely complex waveforms to be synthesized as needed. In addition to producing the precise timing edges, the circuit allows for format switching on any edge (NRZ, RZ, R1, RC) and also handles the parallel-to-serial conversion of test pattern data (from 16-bit parallel at 200MWps to 3.2Gbps serial). The TGFC is intended to be integrated as part of future digital or mixed-signal ATE. The prototype was developed and optimized to support an Fmax of 3.2Gbps as a demonstration. However, the design approach and future hardware may be extended beyond 5Gbps.