Nanoscale MOSFETs scaling

We have carried out numerical modeling of room-temperature operation of Si dual-gate SOI MOSFETs with an ultra-thin, intrinsic (undoped) channel connecting bulk n/sup +/-doped source and drain. If the channel length L is of the order of 10 nm, electron-phonon and surface roughness scattering inside the channel may be neglected, and electron transfer is ballistic. Nevertheless, this transfer may still be well controlled by gate voltage, at small but practical thickness of gate oxide and channel. In contrast with the preliminary analytical model, in our present work the device electrostatics including band bending in source, drain and gate, has been treated explicitly using a numerical Poisson solver, and quantum-mechanical electron tunneling along the channel (under the maximum of the electrostatic potential created by the gate) has been taken into account self-consistently. The results show that the current saturation in very short MOSFETs is due to the transport bottleneck at the electron entrance into the channel, due to electron confinement both in energy and the spatial direction across the channel.