Computer analysis of geometry and strain effects in silicon nano-crystal floating-gate flash memory devices

Author

Thean, A. ; Leburton, J.-P.

Author_Institution

Dept. of Electr. & Comput. Eng., Illinois Univ., Urbana, IL, USA

fYear

2001

fDate

25-27 June 2001

Firstpage

69

Lastpage

70

Abstract

In this paper we use advanced device modeling based on self-consistent 3D Schrodinger and Poisson equations to investigate the detailed operation of nano-crystal floating-gate memory transistors, focusing on the following: (i) The quantization of the many-valley electronic structure and single-electron charging of nano-crystals; (ii) Effects of simple geometry changes on the nano-crystal electronic states, write voltage and retention time of the device; (iii) Influence of strain due to SiO/sub 2//Si lattice-mismatch on the nano-crystal electronic states.

Keywords

MOSFET; Poisson equation; Schrodinger equation; elemental semiconductors; flash memories; nanostructured materials; semiconductor device models; silicon; MOS transistor; Poisson equation; Schrodinger equation; SiO/sub 2/-Si; SiO/sub 2//Si lattice mismatch; computer model; electronic states; geometry effects; many-valley electronic structure; quantization; silicon nano-crystal floating-gate flash memory device; single electron charging; strain effects; Capacitive sensors; Computational geometry; Nanoscale devices; Nonvolatile memory; Poisson equations; Quantization; Silicon; Single electron transistors; Solid modeling; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Device Research Conference, 2001

Conference_Location

Notre Dame, IN, USA

Print_ISBN

0-7803-7014-7

Type

conf

DOI

10.1109/DRC.2001.937876

Filename

937876