• DocumentCode
    3304213
  • Title

    Protocol Proof Checking Simplified with SMT

  • Author

    Tuttle, Mark R. ; Goel, Amit

  • Author_Institution
    Strategic CAD Lab., Intel Corp., Hudson, MA, USA
  • fYear
    2012
  • fDate
    23-25 Aug. 2012
  • Firstpage
    195
  • Lastpage
    202
  • Abstract
    We believe that recent advances in formal verification are on the verge of making formal verification a viable option for any protocol designer, assuming the designer understands the protocol well enough to explain why it works. We demonstrate this with an SMT-based proof checker developed at Intel called the Deductive Verification Framework (DVF). We show how DVF can be used to prove correct a classical, fault-tolerant, distributed protocol for consensus, and describe how a protocol expert starting from scratch, with little-to-no prior familiarity with SMT or DVF, was able to model the protocol and prove it correct in six days and nine pages.
  • Keywords
    computability; distributed processing; formal verification; protocols; software fault tolerance; theorem proving; DVF; Intel; SMT-based proof checker; deductive verification framework; fault-tolerant distributed protocol; formal verification; protocol proof checking; satisfiability modulo theories; Arrays; Computational modeling; Computer crashes; Protocols; Reactive power; Solid modeling; Deductive Verification Framework (DVF); Formal methods; Satisfiability Modulo Theories (SMT); consensus; distributed computing; model checking; theorem proving;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Network Computing and Applications (NCA), 2012 11th IEEE International Symposium on
  • Conference_Location
    Cambridge, MA
  • Print_ISBN
    978-1-4673-2214-0
  • Type

    conf

  • DOI
    10.1109/NCA.2012.46
  • Filename
    6299095