Hardware prototyping of boolean function classification schemes for lossless data compression

In this paper, we present the realization of Boolean function classification schemes on Altera FLEX10K FPGA device for lossless data compression. The compression algorithm is performed by incorporating Boolean function classification into Huffman coding. This allows for more efficient compression because the data has been categorized and simplified before the encoding is done. The design is followed by the timing analysts and circuit synthesis for the validation, functionality and performance of the designated circuit which supports the practicality, advantages and effectiveness of the proposed hardware realization for the applications. The average compression ratio is 25% to 37.5% from numerous testing with various text inputs with a maximum clock frequency of 27.9 MHz