DocumentCode
3310299
Title
Security camera system using sharply outlined display algorithm and variable-clock CVBS encoder
Author
Kim, Joohyun ; Ha, Jooyoung ; Jeong, Shinki ; Yang, Hoongee ; Kang, Bongsoon
Author_Institution
Dept. of Electron. Eng., Dong-A Univ., South Korea
fYear
2006
fDate
7-11 Jan. 2006
Firstpage
79
Lastpage
80
Abstract
In this paper, we propose the security camera system that displays a sharp and clear image by using sharply outlined display algorithm and has less hardware complexity by using a modified composite video baseband signal generator of a variable-clock video encoder. The proposed system is fabricated with the test camera chip that has been manufactured by the MagnaChip 0.25 μm CMOS process.
Keywords
cameras; security; video coding; CMOS process; MagnaChip; camera chip; composite video baseband signal generator; outlined display algorithm; security camera system; variable-clock CVBS encoder; variable-clock video encoder; Baseband; CMOS image sensors; CMOS process; Cameras; Displays; Hardware; Manufacturing processes; Security; Signal generators; System testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Consumer Electronics, 2006. ICCE '06. 2006 Digest of Technical Papers. International Conference on
Print_ISBN
0-7803-9459-3
Type
conf
DOI
10.1109/ICCE.2006.1598319
Filename
1598319
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