• DocumentCode
    3317507
  • Title

    Copper interconnect: migration or bust

  • Author

    Deltoro, G. ; Sharif, N.

  • Author_Institution
    Comdisco Electron. Group, San Diego, CA, USA
  • fYear
    1999
  • fDate
    1999
  • Firstpage
    185
  • Lastpage
    188
  • Abstract
    “Moore´s Law” is losing momentum due to the skyrocketing cost of capital equipment, shortened product life, diminishing returns and tougher technical challenges. Fundamental changes in technology, manufacturing and asset management are required to keep the momentum going. The introduction of copper interconnects is an example of a technology change in wiring required for the next few generation technology nodes. New interconnect schemes and materials are needed to drive the performance and improve the reliability of next generation ICs. Due to its low resistivity, high electromigration resistance and likely “lower” processing cost, copper has been identified as the best candidate to replace aluminum. Better performance is obtained when Cu is combined with “low-k” dielectrics and optimized design. Low-resistivity copper allows use of fewer interconnect layers for logic circuitry. Consequently, compared to the existing metallization scheme, Cu wiring offers the best combination in performance/reliability and cost of ownership requirements. However, there are also potential drawbacks and serious processing challenges to be addressed
  • Keywords
    copper; dielectric thin films; electrical resistivity; electromigration; integrated circuit interconnections; integrated circuit manufacture; integrated circuit metallisation; integrated circuit reliability; Al; Cu; Cu wiring; IC manufacturing; IC reliability; IC technology; Moore´s Law; aluminum; asset management; capital equipment cost; copper interconnects; cost of ownership; electromigration resistance; interconnect layers; interconnect materials; interconnect schemes; logic circuitry; low-k dielectrics; metallization scheme; optimized design; processing challenges; processing cost; product life; reliability; resistivity; technical challenges; technology nodes; wiring technology; Asset management; Conductivity; Copper; Costs; Dielectric materials; Electromigration; Integrated circuit interconnections; Manufacturing; Materials reliability; Wiring;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics Manufacturing Technology Symposium, 1999. Twenty-Fourth IEEE/CPMT
  • Conference_Location
    Austin, TX
  • ISSN
    1089-8190
  • Print_ISBN
    0-7803-5502-4
  • Type

    conf

  • DOI
    10.1109/IEMT.1999.804816
  • Filename
    804816