• DocumentCode
    3319226
  • Title

    Processor Architecture Design Using 3D Integration Technology

  • Author

    Xie, Yuan

  • Author_Institution
    Comput. Sci. & Eng. Dept., Pennsylvania State Univ., University Park, PA, USA
  • fYear
    2010
  • fDate
    3-7 Jan. 2010
  • Firstpage
    446
  • Lastpage
    451
  • Abstract
    The emerging three-dimensional (3D) chip architectures, with their intrinsic capability of reducing the wire length, is one of the promising solutions to mitigate the interconnect problem in modern microprocessor designs. 3D memory stacking also enables much higher memory bandwidth for future chip-multiprocessor design, mitigating the ``memory wall" problem. In addition, heterogenous integration enabled by 3D technology can also result in innovation designs for future microprocessors. This paper serves as a survey of various approaches to design future 3D microprocessors, leveraging the benefits of fast latency, higher bandwidth, and heterogeneous integration capability that are offered by 3D technology.
  • Keywords
    integrated circuit design; microprocessor chips; multiprocessing systems; three-dimensional integrated circuits; 3D integration technology; 3D memory stacking; chip multi-processor architecture design; memory bandwidth; memory wall; three-dimensional chip architecture; Bandwidth; Delay; Integrated circuit interconnections; Integrated circuit technology; Microprocessors; Process design; Stacking; Three-dimensional integrated circuits; Through-silicon vias; Wafer bonding; 3D Technology; Architeture;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Design, 2010. VLSID '10. 23rd International Conference on
  • Conference_Location
    Bangalore
  • ISSN
    1063-9667
  • Print_ISBN
    978-1-4244-5541-6
  • Type

    conf

  • DOI
    10.1109/VLSI.Design.2010.60
  • Filename
    5401205