On-Chip Inductor-Less DC-DC Boost Converter with Non-overlapped Rotational-Interleaving Scheme

An architecture of inductor-less DC-DC boost converter for high efficiency and low output ripple is proposed. Output ripple is reduced by splitting flying capacitors into a number of smaller elements and using a new switching scheme called non-overlapped rotational-interleaving (NORI). The proposed switching scheme also helps to eliminate reversion and shoot through current hence improves the power efficiency. The proposed converter is designed in 0.18 ¿M CMOS thick gate process having 440 pF total flying capacitance. The target specification of load current is 1 mA - 23 mA for 5 V - 6.5 V output voltage from an input supply of 3.3 V. The achieved peak power efficiency is 89% at 10 mA load current as compare to 83% peak power efficiency obtained from the best existing architecture designed in same technology. The output ripple at 10 mA load current is 2.2 mV in presence of only 50 pF load capacitance.