Design optimization and modeling of on-chip RF inductors in 0.13µm and 90nm standard CMOS

This paper discusses general procedures for simulation, design optimization, measurement and modeling of accurate and scalable on-chip RF spiral inductors in standard foundry CMOS for industrial applications. Electro-magnetic (EM) solver is used to simulate and optimize design of a library of inductors with various dimensions and specifications aiming to provide accurate and scalable inductors for typical industrial RF IC designs. A two-step de-embedding method is introduced to ensure precise accurate testing results spanning from 0.1 nH to 20 nH. SPICE inductor parameter extraction based on an improved 2-pi circuit model is conducted to generate accurate BSIM device models for RF IC designs. Design examples in 0.13 mum and 90 nm CMOS are presented.