• DocumentCode
    3331151
  • Title

    Multi-standard carrier generator with CMOS logic divider

  • Author

    Ryu, Seonghan

  • Author_Institution
    Dept. of Inf. & Commun. Eng., Hannam Univ., Daejeon, South Korea
  • fYear
    2009
  • fDate
    2-5 Aug. 2009
  • Firstpage
    1059
  • Lastpage
    1062
  • Abstract
    A multi standard carrier generator chain satisfying all requirements of phase noise and frequency range for Quad-band GSM/EDGE and WCDMA standards is presented. It adopts a VCO utilizing bond-wire inductors with high-quality factor, an 8-bit coarse tune capbank for low VCO gain. CMOS logic dividers are also adopted in this LO chain to meet the most stringent phase noise specification of GSM. The proposed divider structure also shows very wide tuning range of self oscillation frequency (0.54 to 2.44 GHz). The proposed LO chain is implemented in 0.13 mum CMOS technology. The measured tuning range is about 22% (3.25 to 4.05 GHz). The LO chain exhibits a phase noise of -126, -136 and -164 dBc/Hz measured respectively at 400 KHz, 1 MHz and 20 MHz offset from 900 MHz Carrier.
  • Keywords
    3G mobile communication; CMOS logic circuits; Q-factor; broadband networks; cellular radio; code division multiple access; frequency dividers; inductors; phase noise; voltage-controlled oscillators; CMOS logic divider; VCO gain; WCDMA standards; bond-wire inductor; high-quality factor; multistandard carrier generator; phase noise; quad-band GSM-EDGE; Bonding; CMOS logic circuits; CMOS technology; Frequency; GSM; Inductors; Multiaccess communication; Phase noise; Tuning; Voltage-controlled oscillators;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2009. MWSCAS '09. 52nd IEEE International Midwest Symposium on
  • Conference_Location
    Cancun
  • ISSN
    1548-3746
  • Print_ISBN
    978-1-4244-4479-3
  • Electronic_ISBN
    1548-3746
  • Type

    conf

  • DOI
    10.1109/MWSCAS.2009.5235984
  • Filename
    5235984