Low-power implementation of a 4×4 two-dimensional discrete Pascal Transform

The discrete Pascal Transform (DPT) has been shown to be very useful in signal and image processing applications in the detection of edges and bumps. In this paper, an efficient low-power VLSI implementation for a 4times4 two-dimensional discrete Pascal transform is presented. The proposed approach uses multiple supply voltage sources and sleep transistors to produce a balance between power savings and performance. The circuit is synthesized with a TSMC 0.18um technology using both standard and custom designed cells. Our proposed approach provides a power savings of 22 % compared to the single supply voltage case.