Original cabling conditions to insure balanced current during switching transitions between paralleled semiconductors

Author

Jeannin, P.-O. ; Schanen, J.L. ; Clavel, E.

Author_Institution

Lab. d´´Electrotech. de Grenoble, CNRS, Grenoble, France

Volume

3

fYear

1999

fDate

1999

Firstpage

1757

Abstract

This paper deals with the problem of paralleling components. First, general investigations concerning the influence of stray inductances on the current and voltage differences between n paralleled components are presented. Original cabling conditions are deduced to insure balanced electrical constraints. Then, a power module involving two paralleled MOSFETs is analysed. To validate the original presented conditions, two different choppers, involving paralleled power modules have been built, with different layouts. Experimental and simulated results confirm the validity of the proposed rules

Keywords

choppers (circuits); electrical conductivity transitions; power MOSFET; power semiconductor switches; semiconductor device measurement; semiconductor device models; semiconductor device testing; balanced current; balanced electrical constraints; choppers; original cabling conditions; paralleled MOSFETs; paralleled power modules; paralleled semiconductors; stray inductances; switching transitions; Choppers; Inductance; Inductors; MOSFETs; Multichip modules; Power electronics; Switches; Thermal resistance; Voltage control; Welding;

fLanguage

English

Publisher

ieee

Conference_Titel

Industry Applications Conference, 1999. Thirty-Fourth IAS Annual Meeting. Conference Record of the 1999 IEEE

Conference_Location

Phoenix, AZ

ISSN

0197-2618

Print_ISBN

0-7803-5589-X

Type

conf

DOI

10.1109/IAS.1999.805977

Filename

805977