The MDSP (Multimedia DSP) chip with an enhanced instruction set

Author

Yoo, Hyunjune ; Ong, Soohwan ; Sunwoo, Myung H.

Author_Institution

Sch. of Electr. & Electron. Eng., Ajou Univ., Suwon, South Korea

fYear

1999

fDate

1999

Firstpage

98

Lastpage

102

Abstract

This paper presents the second version of the multimedia fixed-point DSP (MDSP) chip for portable multimedia services and its chip implementation. MDSP employs parallel processing techniques, such as SIMD, vector processing, and DSP schemes. MDSP can handle 8-, 16-, 32- or 40-bit data and can perform four MAC operations in parallel. In addition, MDSP can complete various vector operations in a cycle. With these features, MDSP can handle both 2-D video signal processing and 1-D signal processing. The MDSP chip has 73,095 gates, has been fabricated, and is running at 30 MHz

Keywords

application specific integrated circuits; digital signal processing chips; fixed point arithmetic; instruction sets; multimedia systems; parallel architectures; video signal processing; 1D signal processing; 2D video signal processing; 30 MHz; 8 to 40 bit; DSP schemes; MAC operations; SIMD; enhanced instruction set; multimedia fixed-point DSP chip; parallel processing techniques; portable multimedia services; vector processing; Costs; Digital signal processing chips; Energy consumption; Hardware design languages; Microprocessors; Mobile communication; Parallel processing; Partitioning algorithms; Signal processing algorithms; Video signal processing;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC/SOC Conference, 1999. Proceedings. Twelfth Annual IEEE International

Conference_Location

Washington, DC

Print_ISBN

0-7803-5632-2

Type

conf

DOI

10.1109/ASIC.1999.806483

Filename

806483