DocumentCode
3349740
Title
Design and simulation of BiCMOS opamp
Author
Ramanath, D. ; Hasan, M.M.
Author_Institution
Dept. of Electr. Eng., Indian Inst. of Technol., Kanpur, India
fYear
1991
fDate
23-27 Sep 1991
Lastpage
37681
Abstract
A new design of opamp using 5 micron BiCMOS technology is presented. The SPICE simulation results show significant improvement in the performance such as 125 dB open-loop gain, 105 dB CMRR, 20 MHz of unity gain frequency with a phase margin of 65 degrees and 44 V/μs of slew rate. The opamp is expected to operate with ±5 V power supply voltage and the power dissipation is 24 mW
Keywords
BiCMOS integrated circuits; SPICE; circuit analysis computing; operational amplifiers; -5 V; 125 dB; 24 mW; 5 V; 5 micron; BiCMOS opamp; SPICE simulation; monolithic IC; BiCMOS integrated circuits; Bipolar transistors; CMOS technology; Impedance; MOSFETs; Performance gain; Power supplies; Resistors; SPICE; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC Conference and Exhibit, 1991. Proceedings., Fourth Annual IEEE International
Conference_Location
Rochester, NY
Print_ISBN
0-7803-0101-3
Type
conf
DOI
10.1109/ASIC.1991.242858
Filename
242858
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