DocumentCode
3350849
Title
A 0.1-/spl mu/m self-aligned-gate GaAs MESFET with multilayer interconnection structure for ultra-high-speed ICs
Author
Tokumitsu, M. ; Hirano, M. ; Otsuji, T. ; Yamaguchi, S. ; Yamasaki, K.
Author_Institution
NTT Syst. Electron. Labs., Kanagawa, Japan
fYear
1996
fDate
8-11 Dec. 1996
Firstpage
211
Lastpage
214
Abstract
We have developed the technologies to fabricate about 0.1-/spl mu/m-gate-length GaAs MESFETs with a multilayer interconnection structure. We fabricated excellent high-frequency performance of a 0.06-/spl mu/m-gate-length MESFET having current-gain cutoff frequency (f/sub T/) of 168 GHz. Using 0.13-/spl mu/m-gate-length MESFETs, we also fabricated an ultra-high-speed decision circuit operating up to 32 Gbit/s.
Keywords
III-V semiconductors; MESFET integrated circuits; Schottky gate field effect transistors; decision circuits; gallium arsenide; integrated circuit interconnections; 0.1 micron; 168 GHz; 32 Gbit/s; GaAs; current-gain cutoff frequency; decision circuit; fabrication; multilayer interconnection; self-aligned-gate GaAs MESFET; ultra-high-speed IC; Electrodes; Etching; FETs; Gallium arsenide; Gold; Integrated circuit interconnections; MESFET circuits; Microwave Theory and Techniques Society; Nonhomogeneous media; Polyimides;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1996. IEDM '96., International
Conference_Location
San Francisco, CA, USA
ISSN
0163-1918
Print_ISBN
0-7803-3393-4
Type
conf
DOI
10.1109/IEDM.1996.553570
Filename
553570
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