A Trigger System based on fast sampling ADCs - implementation and tests

A Trigger System for a multi-detector setup is presented. The system takes advantage of the newly developed continuous-sampling 16-channel, 12-bit, 160-Msps ADC modules. The ADCs are equipped with programmable logic (FPGA) and perform on-line digital “charge” integration, resolve pile-ups and compute arrival times of detector signals with an accuracy of 1.5 ns. A fast trigger data lane connects the ADC units to a Trigger Module using optical links. Each Trigger Module features 16 optical interfaces (SFP) running at 2 Gb/s input data rate and can be used for evaluating trigger decisions or as a DAQ unit. The Trigger system was implemented in the WASA@COSY experiment, performing on-line event reconstruction, including complex detector calibration, delivering triggers based on multiplicity of tracks fulfilling deposited energy, scattering angle and ΔE/E criteria. Depending on the trigger algorithm used, the trigger latency measured from the actual detector signal to the trigger output amounts to 1.3 - 1.5 μs.