DocumentCode
3354251
Title
On exercising hardware-software logical equivalency using FPGAs
Author
Gomes, Luís ; Costa, Aniko
Author_Institution
Univ. Nova de Lisboa, Monte de Caparica
Volume
4
fYear
2006
fDate
9-13 July 2006
Firstpage
3196
Lastpage
3200
Abstract
This paper addresses a laboratory work, within a digital system design course, where logical equivalency between hardware and software implementations is exercised. The exercise starts with the well-known system decomposition attitude, partitioning the system into control and data path, and giving ground for understanding co-design techniques within embedded system design development process. A comprehensive didactic example is used for illustrating the techniques, built around the well-known multiplier through successive additions. An FPGA (field programmable gate array) is used supporting implementations, taking advantage of reconfigurability capabilities, and accommodating hardware solutions, as well software solutions, where usage of a microcontroller´s IP (intellectual property) is included
Keywords
embedded systems; field programmable gate arrays; hardware-software codesign; FPGA; IP; comprehensive didactic; digital system design course; embedded system; field programmable gate array; hardware-software logical equivalency; intellectual property; microcontroller; system decomposition attitude; system partitioning; Attitude control; Control systems; Digital systems; Embedded system; Field programmable gate arrays; Hardware; Intellectual property; Laboratories; Process design; Software performance; Digital system decomposition; Hardware-software co-design; control and data path;
fLanguage
English
Publisher
ieee
Conference_Titel
Industrial Electronics, 2006 IEEE International Symposium on
Conference_Location
Montreal, Que.
Print_ISBN
1-4244-0496-7
Electronic_ISBN
1-4244-0497-5
Type
conf
DOI
10.1109/ISIE.2006.296128
Filename
4078904
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