A new statistical approach for fault-tolerant VLSI systems

Author

Stapper, C.H.

Author_Institution

IBM Technol. Products, Essex Junction, VT, USA

fYear

1992

fDate

8-10 July 1992

Firstpage

356

Lastpage

365

Abstract

A novel approach to the statistics of fault-tolerant VLSI systems is presented by compounding binomial distributions with a beta distribution. This technique was discovered in the analysis of fault-tolerant dynamic random-access memory (DRAM) chips. Manufacturing data supporting this method are shown and the application of the approach to standard fault-tolerance schemes is described. Special forms of these statistics for computer calculations are also discussed and examples are given.<>

Keywords

DRAM chips; VLSI; fault tolerant computing; beta distribution; binomial distributions; computer calculations; fault-tolerant VLSI systems; fault-tolerant dynamic random-access memory; statistical approach; Circuit faults; Computer aided manufacturing; Fault tolerance; Fault tolerant systems; Integrated circuit manufacture; Integrated circuit yield; Pulp manufacturing; Statistical distributions; Very large scale integration; Yield estimation;

fLanguage

English

Publisher

ieee

Conference_Titel

Fault-Tolerant Computing, 1992. FTCS-22. Digest of Papers., Twenty-Second International Symposium on

Conference_Location

Boston, MA, USA

Print_ISBN

0-8186-2875-8

Type

conf

DOI

10.1109/FTCS.1992.243565

Filename

243565

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3354454