FPGA Implementation of Expandable RSA Pubic-Key Cryptographic Coprocessor

Author

Meng, Qiang ; Liu, Yuan-feng ; Dai, Zi-bin

Author_Institution

Inst. of Electron. Technol., Inf. Eng. Univ., Zhengzhou

fYear

2006

fDate

3-5 Aug. 2006

Firstpage

552

Lastpage

555

Abstract

In order to make the typical Montgomery´s algorithm suitable for various lengths RSA, this paper proposes a scheme for an expandable RSA coprocessor. This design allows for cascading the hardware of process elements when larger modulo are required. The proposed design uses optimized Montgomery´s modular multiplication algorithm. The proposed architecture has distinctive features, i.e. not only the computation speed is significantly fast but also the hardware overhead is drastically decreased

Keywords

coprocessors; field programmable gate arrays; public key cryptography; Montgomery´s modular multiplication algorithm; computation speed; expandable RSA pubic-key cryptographic coprocessor; field programmable gate array; reusable software architecture; Algorithm design and analysis; Computer architecture; Coprocessors; Cryptography; Design engineering; Design optimization; Field programmable gate arrays; Hardware; Pervasive computing; Security; FPGA; Montgomery algorithm; RSA algorithm; expandable; systolic array architecture;

fLanguage

English

Publisher

ieee

Conference_Titel

Pervasive Computing and Applications, 2006 1st International Symposium on

Conference_Location

Urumqi

Print_ISBN

1-4244-0326-x

Electronic_ISBN

1-4244-0326-x

Type

conf

DOI

10.1109/SPCA.2006.297481

Filename

4079052