• DocumentCode
    3355660
  • Title

    Comparison of compact on-chip inductors embedded in wafer-level package

  • Author

    Itoi, Kazuhisa ; Sato, Masakazu ; Okada, Kenichi ; Masu, Kazuya ; Ito, Tatsuya

  • Author_Institution
    Dept. of Micro Device, Fujikura Ltd., Tokyo, Japan
  • fYear
    2005
  • fDate
    31 May-3 June 2005
  • Firstpage
    1578
  • Abstract
    On-chip high-Q spiral inductors on Si substrate embedded in WLP have been fabricated. These inductors consisted of a thick Cu electroplated rerouting to reduce electrical resistance and a thick resin layer to separate the inductors typically 20 μm from Si substrate. The inductance L of 5.0 and 4.9 nH with the quality factor Q of 28.4 and 42.9 were obtained for a 3.5 turn rectangle spiral inductor at 2 GHz on the Si substrate, which had a resistivity of 4-6, 1kΩcm, respectively. The RSi in the assignment parameters for lumped RLC equivalent circuit by ADS denoted more than 5 kΩ in a 3.5 turn. In addition, the measured results of Q, L and fres corresponded well with the simulated values by HFSS and Sonnet. This technology realizes embedded high quality inductors in WLP.
  • Keywords
    Q-factor; RLC circuits; copper; electroplating; elemental semiconductors; equivalent circuits; inductance; inductors; integrated circuit packaging; silicon; system-on-chip; Cu; Cu electroplating; HFSS; RLC equivalent circuit; Sonnet; WLP; electrical resistance; high-Q spiral inductors; inductance; on-chip inductors; quality factor; rectangle spiral inductor; resin layer; wafer-level package; Conductivity; Electric resistance; Equivalent circuits; Inductance; Inductors; Packaging; Q factor; Resins; Spirals; Wafer scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Components and Technology Conference, 2005. Proceedings. 55th
  • ISSN
    0569-5503
  • Print_ISBN
    0-7803-8907-7
  • Type

    conf

  • DOI
    10.1109/ECTC.2005.1442000
  • Filename
    1442000