Power Distribution System Design for a FPGA-Based Ground-Penetrating Radar Receiver

Power distribution system (PDS) development of compact, low-cost ground penetrating radar (GPR) receiver based on field programmable gate array (FPGA) environment is presented. Four key steps of PDS design: transient current, target impedance calculation; bypass capacitor determination; voltage regulator module (VRM) design and inter-planar capacitance calculation are discussed in detail. The design and fabrication process of PDS as well as FPGA-based GPR receiver board are introduced. The frequency spectrum of designed PDSs and data capture experiment results demonstrated that the PDS and other critical hardware components on the receiver are fully functional.