DocumentCode
3360012
Title
A Multilayer Data Copy Scheme for Low Cost Test with Controlled Scan-In Power for Multiple Scan Chain Designs
Author
Lin, Shih Ping ; Lee, Chung Len ; Chen, Jwu E. ; Chen, Ji-Jan ; Luo, Kun-Lun ; Wu, Wen-Ching
Author_Institution
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsin Chu
fYear
2006
fDate
Oct. 2006
Firstpage
1
Lastpage
8
Abstract
The random-like filling strategy pursuing high compression for scan test introduces large test power. To pursue high compression in conjunction with reducing test power for multiple scan chain designs is even harder and very few works were dedicated to solve this problem. This paper proposes and demonstrates a multilayer data copy (MDC) scheme for test compression as well as test power reduction for multiple scan designs. The scheme utilizes a buffer, which supports fast load using previous loaded data, to achieve test data compression and test power reduction at the same time. The scheme can be applied ATPG-independently or to be incorporated in an ATPG to generate highly compressible and power efficient test sets. Experiment results on benchmarks show that test sets generated by the scheme had large compression and power saving with little area design overhead
Keywords
automatic test pattern generation; boundary scan testing; integrated circuit testing; ATPG; automatic test pattern generation; filling strategy; low cost test; multilayer data copy; multiple scan chain designs; scan-in power; test compression; test power reduction; Circuit testing; Costs; Electronic equipment testing; Filling; Hybrid power systems; Nonhomogeneous media; Power generation; Switches; System testing; Test pattern generators;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 2006. ITC '06. IEEE International
Conference_Location
Santa Clara, CA
ISSN
1089-3539
Print_ISBN
1-4244-0292-1
Electronic_ISBN
1089-3539
Type
conf
DOI
10.1109/TEST.2006.297663
Filename
4079341
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