• DocumentCode
    3361649
  • Title

    Stacking technology based on 8-inch wafers using direct connection between TSV and micro-bump

  • Author

    Miyakawa, Nobuaki ; Hashimoto, Eiri ; Maebashi, Takanori ; Nakamura, Natsuo ; Sacho, Yutaka ; Nakayama, Shigeto ; Toyoda, Shinjiro

  • Author_Institution
    Honda Res. Inst. Japan Co., Ltd., Wako
  • fYear
    2008
  • fDate
    21-24 Sept. 2008
  • Firstpage
    647
  • Lastpage
    650
  • Abstract
    We have developed a unique TSV structure and evaluated the connectivity between TSV and micro-bump. The connection resistances are less than 0.7 ohm and the capacitance of TSV is less than 3 pF, respectively. The electrical connection between each wafer was almost 100% and the functional yield reached more than 60%.
  • Keywords
    integrated circuit interconnections; large scale integration; silicon; TSV; connection resistances; microbump; resistance 0.7 ohm; size 8 inch; stacking technology; thru silicon via; wafers; Assembly; Capacitance; Circuits; Contact resistance; Electric resistance; Energy consumption; Large scale integration; Stacking; Through-silicon vias; Wires;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Custom Integrated Circuits Conference, 2008. CICC 2008. IEEE
  • Conference_Location
    San Jose, CA
  • Print_ISBN
    978-1-4244-2018-6
  • Electronic_ISBN
    978-1-4244-2019-3
  • Type

    conf

  • DOI
    10.1109/CICC.2008.4672169
  • Filename
    4672169
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3361649