• DocumentCode
    3362166
  • Title

    High-power digital envelope modulator for a polar transmitter in 65nm CMOS

  • Author

    Collados, Manel ; Van Zeijl, Paul T M ; Pavlovic, Nenad

  • Author_Institution
    NXP Semicond. Res., Eindhoven
  • fYear
    2008
  • fDate
    21-24 Sept. 2008
  • Firstpage
    733
  • Lastpage
    736
  • Abstract
    In this paper, an 8-bit envelope modulator as part of a digital polar transmitter for Bluetooth and WLAN is demonstrated. The modulator performs digital-to-analog conversion, up-mixing and power amplification, allowing for an area-efficient, fully-integrated transmitter architecture. The circuit delivers 24.8 dBm peak-power and 16.7 dBm WLAN OFDM power with a mean EVM of 2.7% at 2 GHz. The measured peak-power drain efficiency is 51% while the efficiency for OFDM is 24%. In Bluetooth EDR mode a 19.7 dBm signal with 5%-rms, 13%-peak EVM, and 26% drain efficiency has been measured. The circuit is fabricated in CMOS 65 nm with 50 Aring thick-oxide devices and 2.5 V power supply.
  • Keywords
    Bluetooth; CMOS integrated circuits; OFDM modulation; digital-analogue conversion; radio transmitters; wireless LAN; Bluetooth; CMOS process; OFDM power; WLAN; digital polar transmitter; digital-to-analog conversion; frequency 2 GHz; high-power digital envelope modulator; peak-power drain efficiency; power amplification; size 65 nm; transmitter architecture; voltage 2.5 V; Baseband; Bluetooth; CMOS technology; Circuits; Digital modulation; Digital-analog conversion; OFDM modulation; RF signals; Radio transmitters; Wireless LAN;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Custom Integrated Circuits Conference, 2008. CICC 2008. IEEE
  • Conference_Location
    San Jose, CA
  • Print_ISBN
    978-1-4244-2018-6
  • Electronic_ISBN
    978-1-4244-2019-3
  • Type

    conf

  • DOI
    10.1109/CICC.2008.4672192
  • Filename
    4672192