A Novel LNA Topology with Transformer-based Input Integrated Matching and its 60-GHz Millimeter-wave CMOS 65-nm Design

A novel LNA topology with a transformer-based input integrated matching is proposed and its application to the 60-GHz millimeter-wave design in bulk CMOS 65 nm technology is reported. This topology exploits a novel technique to realize the input integrated matching (simultaneous input impedance and minimum noise matching to the source resistance) in cascode amplifier. This new technique does not require the traditional inductive source (emitter) degeneration, which decreases the gain at high frequency and especially in the range of the millimeter waves. This new topology has been implemented as the first stage of a two-stage LNA. Post-layout simulations of the two-stage LNA show S11 of -16.84 dB at 61.45 GHz, and S21 equal to 10.02 dB at 60 GHz, NF equal to 8.68 dB at 60 GHz, input-referred CP1dB equal to -13 dBm, with an associated overall power consumption of 18.5 mW.