DocumentCode
3367030
Title
Multi-stage IIR decimation filter design technique for high resolution sigma-delta A/D converters
Author
Park, Sangil ; Chen, Wei
Author_Institution
Motorola Inc., Austin, TX, USA
fYear
1992
fDate
12-14 May 1992
Firstpage
561
Lastpage
566
Abstract
The authors present a design technique for a multistage halfband filter with infinite-impulse-response (IIR) structure to enhance the effective resolution of oversampling analog-to-digital (A/D) converters. A series of six cascaded IIR filters is implemented to obtain more than 18-b of effective resolution for a digital signal with 12-b resolution from the DSP56ADC16 converter. Since this proposed structure is flexible, the number of stages in the decimation process can be adjusted to fit the needs of a specific application. By taking advantages of the oversampling methodology, more than 120 dB of SNR can be theoretically achieved. The analysis of the proposed method and experimental comparison with previously presented structures are included
Keywords
analogue-digital conversion; digital filters; network synthesis; signal processing equipment; DSP56ADC16 converter; IIR decimation filter design; cascaded IIR filters; comb filter; effective resolution; multistage halfband filter; oversampling analog-to-digital; quantisation errors; sigma-delta A/D converters; Analog-digital conversion; Delta-sigma modulation; Digital signal processors; Finite impulse response filter; Frequency conversion; IIR filters; Low pass filters; Quantization; Signal resolution; Signal sampling;
fLanguage
English
Publisher
ieee
Conference_Titel
Instrumentation and Measurement Technology Conference, 1992. IMTC '92., 9th IEEE
Conference_Location
Metropolitan, NY
Print_ISBN
0-7803-0640-6
Type
conf
DOI
10.1109/IMTC.1992.245076
Filename
245076
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