Max and min functions using Multiple-Valued Recharged Semi-Floating Gate circuits

Author

Gundersen, H. ; Berg, Y.

Author_Institution

Dept. of Inf., Oslo Univ., Norway

Volume

2

fYear

2004

fDate

23-26 May 2004

Abstract

In this paper we present a new proposal for implementing a voltage-mode Multiple-Valued (MV) maximum or minimum function. The circuit has been implemented using Recharged Semi Floating-Gate (SFG) transistors. The benefit with this design is, the proposed circuits can easily be fabricated using a conventional CMOS process. The circuit is suitable for a low power design, V_dd<2 volt. It has high noise margin and good linearity. The simulation results for the proposed circuit are evaluated using AMS 0.35 μm CMOS device parameters.

Keywords

CMOS logic circuits; integrated circuit design; integrated circuit modelling; integrated circuit noise; low-power electronics; mass spectra; multivalued logic circuits; 0.35 micron; AMS; CMOS device parameter; CMOS process; circuit simulation; linearity; low power design; multiple valued recharged semifloating gate circuit; noise margin; recharged semi floating gate transistor; voltage mode multiple valued maximum function; voltage mode multiple valued minimum function; CMOS logic circuits; CMOS process; Capacitors; Circuit noise; Informatics; Logic devices; Proposals; Pulse inverters; Switches; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on

Print_ISBN

0-7803-8251-X

Type

conf

DOI

10.1109/ISCAS.2004.1329407

Filename

1329407