• DocumentCode
    3374364
  • Title

    Passive multiplexer test structure for fast and accurate contact and via fail rate evaluation

  • Author

    Hess, Christopher ; Stine, Brian E. ; Weiland, Larg H. ; Mitchell, Todd ; Karnett, M. ; Gardner, Keith

  • Author_Institution
    PDF Solutions Inc.,, San Jose, CA, USA
  • fYear
    2002
  • fDate
    8-11 April 2002
  • Firstpage
    163
  • Lastpage
    167
  • Abstract
    Complexity of integrated circuits has led to many millions of contacts and vias on every chip. To allow accurate yield evaluation, it is required to determine fail rates of < 10 faults per billion which requires test structures with huge chains of 1 million or more contact and vias. At the same time contacts and vias are getting smaller and thus their resistance is increasing for every new technology node. Consequently, the resistance of such chains becomes impossible to measure. To overcome this limit without increasing the number of measurement pads, we are proposing a Passive Multiplexer Array of via chains, which breaks up a huge contact/via chain in many individually measurable sub-chains. Accuracy of fail rates will be increased, since the fail rate can be determined based on many sub-chains, instead of being determined based on one huge chain only. Furthermore, this test structure better supports failure analysis, since it is faster to locate a faulty contact or via. No additional devices or process steps are required which allows implementation as short flows for fast process problem debugging.
  • Keywords
    CMOS integrated circuits; failure analysis; fault location; integrated circuit interconnections; integrated circuit measurement; integrated circuit reliability; integrated circuit testing; integrated circuit yield; multiplexing equipment; contact fail rate evaluation; contact/via chain; fail rate accuracy; fast process problem debugging; faulty contact location; faulty via location; five-layer metal CMOS process; integrated circuit complexity; measurement pads; passive multiplexer test structure; via fail rate evaluation; yield evaluation; Circuit faults; Circuit testing; Contact resistance; Debugging; Electrical resistance measurement; Integrated circuit interconnections; Integrated circuit yield; Multiplexing; Resists; Silicon compounds;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microelectronic Test Structures, 2002. ICMTS 2002. Proceedings of the 2002 International Conference on
  • Print_ISBN
    0-7803-7464-9
  • Type

    conf

  • DOI
    10.1109/ICMTS.2002.1193190
  • Filename
    1193190