A 2.5 milliwatt SOS CMOS receiver for optical interconnect

Author

Apsel, A. ; Fu, Z.

Author_Institution

Cornell Univ., Ithaca, NY, USA

Volume

5

fYear

2004

fDate

23-26 May 2004

Abstract

We demonstrate a low power, high bit rate, cross coupled differential receiver in silicon on sapphire (SOS) CMOS to be used as part of an inter-chip optical interconnect. The internal amplifier of the transimpedance first stage provides high gain without requiring large, capacitive input gates. The resulting transimpedance stage extends the bandwidth of the differential receiver when small photodetectors are used. We fabricate this receiver in an SOS CMOS process to simplify the packaging of chip-to-chip interconnects with CMOS processors. The total measured power consumption of this receiver is 2.5 mW at gigabit rates, in a 0.5 μm UTSi™ SOS CMOS process.

Keywords

CMOS integrated circuits; integrated circuit interconnections; integrated optoelectronics; low-power electronics; optical interconnections; optical receivers; photodetectors; sapphire; silicon-on-insulator; 0.5 micron; 2.5 mW; SOS CMOS receiver; Si; UTSi SOS CMOS process; bandwidth extension; capacitive input gate; chip-to-chip interconnect packaging; cross coupled differential receiver; high bit rate differential receiver; interchip optical interconnect; internal amplifier; low power differential receiver; photodetectors; power consumption; silicon on sapphire CMOS; transimpedance stage; Bandwidth; Bit rate; CMOS process; Optical amplifiers; Optical coupling; Optical interconnections; Optical receivers; Packaging; Photodetectors; Silicon;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on

Print_ISBN

0-7803-8251-X

Type

conf

DOI

10.1109/ISCAS.2004.1329731

Filename

1329731