• DocumentCode
    3377012
  • Title

    Improving flow line scheduling by upstream mixed integer resource allocation in a wafer test facility

  • Author

    Doleschal, Dirk ; Lange, Jan ; Weigert, Gerald ; Klemmt, Andreas

  • Author_Institution
    Electron. Packaging Lab., Tech. Univ. Dresden, Dresden, Germany
  • fYear
    2012
  • fDate
    9-12 Dec. 2012
  • Firstpage
    1
  • Lastpage
    12
  • Abstract
    The effort for scheduling real manufacturing systems is generally very high for mathematical as well as for simulation-based methods. Combining both methods is the key for solving complex scheduling problems. The paper introduces a special approach, where at first a static resource allocation problem is solved by mixed integer programming (MIP). Based on the resulting reduced dedication matrices, feasible schedules are then generated by a discrete event simulation (DES). Possible applications can be found in many parts of the semiconductor manufacturing process, for example in the wafer test. The investigated wafer test consists of two pronounced bottlenecks; each of it is formed as a workcenter with its own dedication matrix. After testing the method with practice oriented benchmarks, the benefits of the approach are shown on data derived directly from the semiconductor manufacturing process.
  • Keywords
    computational complexity; discrete event simulation; integer programming; manufacturing systems; matrix algebra; production engineering computing; production testing; resource allocation; scheduling; semiconductor device manufacture; semiconductor technology; DES; MIP; NP-hard optimization problems; complex scheduling problems; discrete event simulation; flow line scheduling improvement; mixed integer programming; real manufacturing system scheduling; reduced dedication matrices; semiconductor manufacturing process; simulation-based methods; static resource allocation problem; upstream mixed integer resource allocation; wafer test facility; Benchmark testing; Capacity planning; Job shop scheduling; Optimization; Resource management; Schedules; Semiconductor device modeling;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Simulation Conference (WSC), Proceedings of the 2012 Winter
  • Conference_Location
    Berlin
  • ISSN
    0891-7736
  • Print_ISBN
    978-1-4673-4779-2
  • Electronic_ISBN
    0891-7736
  • Type

    conf

  • DOI
    10.1109/WSC.2012.6465228
  • Filename
    6465228