• DocumentCode
    3377432
  • Title

    Clustering-based simultaneous task and voltage scheduling for NoC systems

  • Author

    Liu, Yifang ; Yang, Yu ; Hu, Jiang

  • Author_Institution
    Google Inc., Mountain View, CA, USA
  • fYear
    2010
  • fDate
    7-11 Nov. 2010
  • Firstpage
    277
  • Lastpage
    283
  • Abstract
    Networks-on-chip (NoC) is emerging as a promising communication structure, which is scalable with respect to chip complexity. Meanwhile, latest chip designs are increasingly leveraging multiple voltage-frequency domains for energy-efficiency improvement. In this work, we propose a simultaneous task and voltage scheduling algorithm for energy minimization in NoC based designs. The energy-latency tradeoff is handled by Lagrangian relaxation. The core algorithm is a clustering based approach which not only assigns voltage levels and starting time to each task (or Processing Element) but also naturally finds voltage-frequency clusters. Compared to a recent previous work, which performs task scheduling and voltage assignment sequentially, our method leads to an average of 20% energy reduction.
  • Keywords
    integrated circuit design; network-on-chip; Lagrangian relaxation; NoC systems; energy-latency tradeoff; multiple voltage-frequency domain; networks-on-chip; processing element; task scheduling; voltage level; voltage scheduling; voltage-frequency clusters; Clustering algorithms; Clustering methods; Delay; Energy consumption; Lagrangian functions; Tiles;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer-Aided Design (ICCAD), 2010 IEEE/ACM International Conference on
  • Conference_Location
    San Jose, CA
  • ISSN
    1092-3152
  • Print_ISBN
    978-1-4244-8193-4
  • Type

    conf

  • DOI
    10.1109/ICCAD.2010.5654180
  • Filename
    5654180