Native-conflict-aware wire perturbation for double patterning technology

The double patterning technology (DPT), in which a dense layout pattern is decomposed into two separate masks to relax its pitch, is the most popular lithography solution for the sub-22nm node to enhance pattern printability. Previous works focus on stitch insertion to improve the decomposition success rate. However, there exist native conflicts (NC´s) which cannot be resolved by any kind of stitch insertion. A design with NC´s is not DPT-compliance and will eventually fail the decomposition, resulting in DFM redesign and longer design cycles. In this paper, we give a sufficient condition for the NC existence and propose a geometry-based method for NC prediction to develop an early stage analyzer for DPT decomposability checking. Then, a wire perturbation algorithm is presented to fix as many NC´s in the layout as possible. The algorithm is based on iterative 1D-compaction and can easily be embedded into existing industrial compaction systems. Experimental results show that the proposed algorithm can significantly reduce the number of NC´s by an average of 85%, which can effectively increase the decomposition success rate for the next stage.