Computer-based learning environment for the teaching of logic synthesis

The Teaching and Learning Technology Project (TLTP) Electronic Design Education Consortium is a group of 8 Universities whose aim is to develop computer based learning (CBL) material (courseware) to support the education of Electronic Engineers and Computer Scientists in the design of electronic circuits and systems. The use of CBL allows use of colour graphics and animation to enhance the material. It allows the demonstration of principles which would otherwise be difficult to teach. There are three important aims regarding the production of this material: it should enhance the learning experience of the student, increase the number of students that a lecturer can support, and improve the use of the industry standard CAD software that is available under the ECAD and EUROCHIP initiatives. The work was divided into 4 themes, namely, Electronic Circuit Design, Digital Design, System and High Level Design and Testing and Design for Test. The System and High Level Design theme is known as Theme C which is divided into topics relating to high-level design, specification, synthesis, logic optimization and FSM synthesis. This paper will mainly concentrate on the production of logic optimization and technology mapping CBL material. This paper will discuss the environment, how courseware is developed and how CAD tools are integrated into the system