DocumentCode
3378570
Title
Testing mixed signal ASICs through the use of supply current monitoring
Author
Eckersall, K.R. ; Wrighton, P.L. ; Bell, I.M. ; Bannister, B.R. ; Taylor, G.E.
Author_Institution
Hull Univ., UK
fYear
1993
fDate
19-22 Apr 1993
Firstpage
385
Lastpage
391
Abstract
The authors investigate testing of mixed signal integrated circuits. Several approaches are proposed, most requiring careful partitioning of the analogue and digital sections. However, the use of supply current monitoring is applicable to both digital and analogue sections. Digital testing has been widely investigated, concentrating on quiescent Iddq testing. Using pseudo-random binary test signals with supply current testing, high fault coverage of both catastrophic FET faults and gate oxide shorts in the analogue section is shown to be obtainable. Use of on-chip supply sensors has also been investigated
Keywords
application specific integrated circuits; fault location; integrated circuit testing; mixed analogue-digital integrated circuits; catastrophic FET faults; fault coverage; gate oxide shorts; on-chip supply sensors; pseudo-random binary test signals; quiescent Iddq testing; supply current monitoring; Application specific integrated circuits; Automatic testing; Circuit faults; Circuit testing; Costs; Current supplies; Design for testability; Integrated circuit testing; Logic testing; Monitoring;
fLanguage
English
Publisher
ieee
Conference_Titel
European Test Conference, 1993. Proceedings of ETC 93., Third
Conference_Location
Rotterdam
Print_ISBN
0-8186-3360-3
Type
conf
DOI
10.1109/ETC.1993.246580
Filename
246580
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