A test approach of combining partial scan with functional testing for high performance processors

In structural test approach, the design performance would be decreased when the flip-flops in the critical timing paths are replaced with scannable equivalents. For high performance processors design, it could not meet the timing requirement. This paper presents an approach based on the combination of partial scan with functional testing for high performance processors. In this approach, the faults in the critical timing path of design are detected by functional tests, and the rest are detected by partial scan tests. It has no influence on the design performance and can reach high fault coverage. Experimental results of the SuperV DSP show that the fault coverage can reach 98.85%, achieving the goal of the manufacturing testing.